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E2I0025-17-Y1 Semiconductor
Semiconductor MSM521008
131,072-Word 8-Bit CMOS STATIC RAM
This version: Jan. 1998 MSM521008 Previous version: Aug. 1996
DESCRIPTION
The MSM521008 is a 131,072-word by 8-bit CMOS fast static RAM featuring a single 5 V power supply operation and direct TTL input/output compatibility. Since the circuitry is completely static, external clock and refreshing operations are unnecessary, making this device very easy to use. The MSM521008 uses NMOS cells and CMOS peripherals and provides high-speed operation at 17 ns access time. In addition, the MSM521008 is provided with a chip enable signal (CE1) suited to the expansion of a memory capacity, a chip enable signal (CE2) suited to the power-down function, and an output enable signal (OE) suited to the I/O bus line control.
FEATURES
* 131,072-word 8-bit configuration * Single 5 V power supply * Fully static operation * Operating temperature range: Ta = 0C to 70C * Power dissipation Standby: 1 mA (Max.) Operation: - 17 180 mA (Max.) - 20 170 mA (Max.) - 25 160 mA (Max.) * Access time: - 17 17 ns (Max.) - 20 20 ns (Max.) - 25 25 ns (Max.) * (Input/Output) TTL compatible * Power-down function by chip enable signal * 3-state output * Package: 32-pin 400 mil plastic SOJ (SOJ32-P-400-1.27)
(Product : MSM521008-xxJS) xx indicates speed rank.
PRODUCT FAMILY
Family MSM521008-17 MSM521008-20 MSM521008-25 Access Time (Max.) 17 ns 20 ns 25 ns Package 400 mil 32-pin SOJ
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Semiconductor
PIN CONFIGURATION (TOP VIEW)
NC 1 A0 2 A1 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9

A8 10 A9 11 A10 12 I/O0 13 I/O1 14 I/O2 15 VSS 16
Pin Name A0 - A16 I/O0 - I/O7 CE1, CE2 OE WE VCC, VSS NC
MSM521008
32 VCC 31 A16 30 CE2 29 WE 28 A15 27 A14 26 A13 25 A12 24 OE 23 A11 22 CE1 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3
32-Pin Plastic SOJ
Function Address Input Data Input/Output Chip Enable Output Enable Write Enable Power Supply No Connection
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Semiconductor
MSM521008
BLOCK DIAGRAM
A5 A10 A9 A8 A6 A3 A2 A1 A0 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 Memory Array 512 Rows 256 Columns 8 Blocks
V CC V SS
Row Select
Input Data Control
Column I/O Circuits Column Select
A4 A7
A11 A13 A15 A12 A14 A16
CE2 CE1 WE OE
FUNCTION TABLE
Operating Mode CE1 H Read Cycle * L L H Write Cycle * L CE2 * L H H * L H WE * * H H * * L OE * * H L * * * Data Read Output Floating Data Write Output Floating Operating Contents Power Mode Standby Standby Active Active Standby Standby Active
*Don't Care ("H" or "L")
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Semiconductor
MSM521008
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter Power Supply Voltage Pin Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VCC VT PD Topr Tstg Condition Ta = 25C, for VSS Ta = 25C -- -- Rating -0.3 to 7.0 -0.3* to VCC + 0.3 1.0 0 to 70 -55 to 125 Unit V V W C C
* -3.0 V Min. for pulse width less than 10 ns. Recommended Operating Conditions
Parameter Power Supply Voltage Input High Voltage Input Low Voltage Load Capacitance Symbol VCC VSS VIH VIL CL Condition -- VCC = 5 V 10% -- Min. 4.5 0 2.2 -0.3* -- Typ. 5 0 -- -- -- Max. 5.5 0 VCC + 0.3 0.8 30 Unit V V V V pF
* -3.0 V Min. for pulse width less than 10 ns. Capacitance
(Ta = 25C, f = 1 MHz) Parameter Input Capacitance Input/Output Capacitance Symbol CI CI/O Condition VIN = 0 V VI/O = 0 V Min. -- -- Max. 6 8 Unit pF pF
Note:
This parameter is periodically sampled and not 100% tested.
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Semiconductor DC Characteristics
MSM521008
(VCC = 5 V 10%, Ta = 0C to 70C) Parameter Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Symbol ILI ILO VOH VOL Condition VIN = 0 to VCC CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL, VOUT = 0 to VCC IOH = -4.0 mA IOL = 8.0 mA CE1 VCC - 0.2 V, CE2 VCC - 0.2 V or 0 V CE2 0.2 V, VIN 0.2 V or VIN VCC - 0.2 V CE1 = VIH, CE2 = VIL, TCYC = Min. cycle CE1 = VIL, CE2 = VIH, TCYC = Min. cycle, IOUT = 0 mA Min. -10 -10 2.4 -- MSM521008 Typ. Max. -- -- -- -- 10 10 -- 0.4 Unit mA mA V V
Standby Power Supply Current
ICCS
--
--
1
mA
ICCS1 Operating Power Supply Current
--
--
20
mA
ICCA
--
--
q
mA 180 mA 170 mA 160 mA
q 521008-17 521008-20 521008-25
AC Characteristics Test Conditions
Parameter Input Pulse Level Input Rise and Fall Times Input/Output Timing Level Output Load Condition VIH = 3 V, VIL = 0 V 3 ns 1.5 V See Figures
5V 480 W DOUT 255 W 30 pF (Including scope and jig) DOUT 255 W
5V 480 W
5 pF (Including scope and jig)
Figure 1 Output Load
Figure 2 Output Load (tOLZ, tOHZ, tCLZ1, tCLZ2, tCHZ1, tCHZ2, tWLZ, tWHZ)
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Semiconductor Read Cycle
MSM521008
(VCC = 5 V 10%, Ta = 0C to 70C) MSM521008-17 Parameter Read Cycle Time Address Access Time CE1, CE2 Access Time OE Access Time CE1, CE2 to Output in Low-Z OE to Output in Low-Z Output Hold Time from Address Change CE1, CE2 to Output in High-Z OE to Output in High-Z Symbol tRC tAA tCO1 tCO2 tOE tCLZ1 tCLZ2 tOLZ tOH tCHZ1 tCHZ2 tOHZ Min. 17 -- -- -- -- 3 3 0 3 -- -- -- Max. -- 17 17 17 9 -- -- -- -- 7 7 7 MSM521008-20 Min. 20 -- -- -- -- 3 3 0 3 -- -- -- Max. -- 20 20 20 10 -- -- -- -- 8 8 8 MSM521008-25 Min. 25 -- -- -- -- 3 3 0 3 -- -- -- Max. -- 25 25 25 12 -- -- -- -- 10 10 10 Unit ns ns ns ns ns ns ns ns ns
Address Controlled Read (WE = H, CE1 = L, CE2 = H, OE = L)
tRC ADDRESS tAA tOH DOUT Dataout Valid
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, ,
Semiconductor CE1, CE2, OE Controlled Read (WE = H)
tRC ADDRESS tAA tCHZ1 CE1 tCO1 tCLZ1 CE2 tCO2 tCLZ2 tCHZ2 OE tOE tOHZ DOUT Dataout Valid tOLZ tOH
MSM521008
Notes :
1. 2. 3. 4.
A read cycle occurs during the overlap of CE1 = "L", CE2 = "H", OE = "L" and WE = "H". tCLZ1 and tCLZ2 are specified from CE1 = "L" or CE2 = "H", whichever occurs last. tCHZ1 and tCHZ2 are specified from CE1 = "H" or CE2 = "L", whichever occurs first. tOHZ, tCHZ1 and tCHZ2 are specified by the time when DATA is floating, not defined by the output level.
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Semiconductor Write Cycle
Parameter Write Cycle Time Address Setup Time Write Pulse Width WE Write Recovery Time Data Setup Time Data Hold Time WE to Output in High-Z CE1 CE2 tDS tDH tWHZ tCW1 tAW tCW2 tWLZ tWR Symbol tWC tAS tWP
MSM521008
(VCC = 5 V 10%, Ta = 0C to 70C) MSM521008-17 MSM521008-20 MSM521008-25 Min. 17 0 13 0 0 0 9 0 -- 13 13 0 Max. -- -- -- -- -- -- -- -- 7 -- Min. 20 0 15 0 0 0 10 0 -- 15 15 0 Max. -- -- -- -- -- -- -- -- 8 -- Min. 25 0 20 0 0 0 12 0 -- 20 Max. -- -- -- -- -- -- -- -- 10 -- ns ns ns ns ns Unit ns ns ns
, ,
CE1, CE2 to End of Write -- -- 20 0 -- Address Valid to End of Write 13 -- 15 -- -- 20 -- ns Output Active from End of Write -- -- ns
WE Controlled Write (OE = L)
tWC
ADDRESS
tCW1
CE1
CE2
tCW2
tAW
WE
tAS
tWR
tWP
tWLZ
DOUT
tDS
tDH
tWHZ
DIN
Data In
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Semiconductor CE1, CE2 Controlled Write (OE = H)
tWC ADDRESS tAS CE1 tCW1
MSM521008
CE2
WE
DIN
DOUT
Notes:

tCW2 tAW tWR tWP tDS tDH Data In High Impedance
1. 2. 3. 4. 5.
A write cycle occurs during the overlap of CE1 = "L", CE2 = "H" and WE = "L". OE may be either of "H" or "L" in the write cycle. tAS is specified from CE1 = "L", CE2 = "H" or WE = "L", whichever occurs last. tWP is an overlap time of CE1 = "L", CE2 = "H" and WE = "L". tWR, tDS and tDH are specified from CE1 = "H", CE2 = "L" or WE = "H", whichever occurs first. 6. tWHZ is specified by the time when DATA output is floating, not defined by the output level. 7. When I/O pins are in the output mode, don't apply the inverted input signal to the output pins.
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Semiconductor Data Retention Characteristics
Parameter Symbol Condition CE1 VCC - 0.2 V, CE2 VCC - 0.2 V or 0 V CE2 0.2 V, VIN = 0 to VCC VCC = 3 V, VIN = 0 to VCC, CE1 VCC - 0.2 V, CE2 VCC - 0.2 V or 0 V CE2 0.2 V -- -- Min. Typ.
MSM521008
(Ta = 0C to 70C) Max. Unit
Data Retention Power Supply Voltage
VCCH
2.0
--
--
V
Data Retention Power Supply Current
ICCH
--
--
500
mA
Chip Deselect to Data Retention Time Operation Recovery Time
tCDR tR
0 5
-- --
-- --
ns ms
CE1 Control
tCDR VCC 4.5 V 2.2 V VCCH CE1 0V CE1 VCC - 0.2 V Data Retention Mode tR
CE2 Control
Data Retention Mode VCC 4.5 V tCDR CE2 VCCH 0.8 V 0V CE2 0.2 V tR
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Semiconductor
MSM521008
PACKAGE DIMENSIONS
(Unit : mm)
SOJ32-P-400-1.27
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.42 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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